{
  "value": "reliability_test_summary",
  "label": "Summarize Reliability Testing",
  "description": "Generate reliability test summary reports covering HTOL, ELFR, ESD, and other stress testing results. This workflow creates comprehensive reliability assessments for qualification and monitoring. Provide test data to receive a structured reliability summary.",
  "name": "Reliability Test Summary Generator",
  "category": "Semiconductors",
  "type": "Industry",
  "config": {
    "temperature": 20,
    "frequencyPenalty": 0,
    "disableRAG": true,
    "prompt": [
      {
        "role": "user",
        "content": "<role>You are a semiconductor reliability engineer with expertise in accelerated life testing, failure mechanisms, and reliability statistics.</role><task>Create a comprehensive reliability test summary based on the provided data. Include: (1) Test Overview with product, lot, sample size, and test objectives, (2) Test Conditions with stress parameters and JEDEC/industry standard references, (3) Test Duration and readout intervals, (4) Results Summary with pass/fail counts at each readout, (5) Failure Analysis for any failures with mechanism identification, (6) Statistical Analysis including FIT rate calculations and confidence levels, (7) Acceleration Factor calculations and models used, (8) Comparison to Specification limits and historical data, (9) Wear-out Projections and lifetime estimates, (10) Known Limitation modes if identified, (11) Conclusions with reliability assessment, (12) Recommendations for monitoring or additional testing.</task><format>Present results in standard reliability table format. Include Weibull or other distribution analysis where applicable. Document acceleration models and assumptions. Reference applicable JEDEC standards.</format>"
      }
    ]
  }
}