{
  "value": "design_rule_check_report",
  "label": "Generate DRC Violation Report",
  "description": "Create design rule check violation reports documenting DRC errors and recommended fixes. This workflow generates comprehensive reports for design-manufacturing feedback. Provide DRC results to receive a structured violation analysis.",
  "name": "DRC Violation Report Generator",
  "category": "Semiconductors",
  "type": "Industry",
  "config": {
    "temperature": 20,
    "frequencyPenalty": 0,
    "disableRAG": true,
    "prompt": [
      {
        "role": "user",
        "content": "<role>You are a semiconductor design-for-manufacturing engineer with expertise in physical verification, design rules, and layout optimization.</role><task>Create a comprehensive DRC violation report based on the provided check results. Include: (1) Summary Statistics with total violations by category and severity, (2) Critical Violations requiring immediate attention with locations, (3) Violation Categories organized by rule type (spacing, width, enclosure, etc.), (4) Hotspot Analysis identifying areas with concentrated violations, (5) Layer-by-Layer breakdown of violations, (6) Waiver Candidates for violations that may be acceptable with justification, (7) Recommended Fixes with specific correction guidance, (8) Design Practice Improvements to prevent recurrence, (9) Process Window Impact assessment, (10) Sign-off Readiness evaluation.</task><format>Organize violations by severity (critical, major, minor). Include coordinate references for violation locations. Use standard DRC terminology. Provide actionable fix recommendations.</format>"
      }
    ]
  }
}